RF Design-16: Practical Power Amplifier Design - Part 1

00:52:28
https://www.youtube.com/watch?v=-GLPH9BYvSo

Ringkasan

TLDREste vídeo é a primeira parte de um tutorial em três partes sobre o design prático de amplificadores de potência. O objetivo é levar os espectadores desde um dispositivo simples até um layout finalizado de amplificador de potência, validado para análises de sinal modulado e digital. O vídeo cobre tópicos como a importância da carga e fonte, análise de eficiência e linearidade, e a necessidade de um modelo não linear adequado. O apresentador também discute diferentes classes de operação de amplificadores e a importância de dispositivos de nitreto de gálio (GaN) para designs de amplificadores de potência.

Takeaways

  • 🔧 Tutorial em três partes sobre design de amplificadores de potência.
  • 📈 Importância da eficiência e linearidade em amplificadores.
  • ⚙️ Dispositivos GaN são preferidos por sua alta densidade de potência.
  • 📊 Análise de carga é crucial para otimização do amplificador.
  • 📚 Modelos não lineares são essenciais para previsões precisas.
  • 🔍 Diferentes classes de operação têm suas vantagens e desvantagens.
  • 💡 DPD melhora a linearidade do amplificador.
  • 📅 Segunda parte abordará design de rede de correspondência.
  • 📉 A eficiência impacta custos operacionais e duração da bateria.
  • 🛠️ O design começa com um bom modelo não linear.

Garis waktu

  • 00:00:00 - 00:05:00

    Benvido ao tutorial 16 sobre o deseño práctico de amplificadores de potencia. Este é o primeiro de tres vídeos que cubrirán desde un dispositivo simple ata un deseño finalizado de amplificador de potencia validado para diferentes análises de sinais.

  • 00:05:00 - 00:10:00

    O obxectivo desta serie de tutoriales é guiar aos espectadores a través do proceso de deseño de amplificadores de potencia, incluíndo a análise de sinais modulados e a predistorción dixital para obter as especificacións adecuadas para comunicacións sen fíos.

  • 00:10:00 - 00:15:00

    Os amplificadores de potencia son fundamentais na cadea de transmisión de calquera sistema sen fíos, xa que deben producir suficiente potencia de saída para superar as perdas do canal entre o transmisor e o receptor, garantindo a mellor calidade de enlace posible.

  • 00:15:00 - 00:20:00

    A eficiencia é un dos principais requisitos no deseño de amplificadores de potencia, xa que afecta directamente aos custos operativos e á duración da batería en dispositivos portátiles. A linealidade tamén é crucial para preservar a integridade da sinal.

  • 00:20:00 - 00:25:00

    O tutorial revisa as clases de operación dos amplificadores de potencia, como A, B, AB e C, explicando as súas vantaxes e desvantaxes, así como a importancia de seleccionar a clase adecuada para o deseño específico.

  • 00:25:00 - 00:30:00

    Un bo deseño de amplificador de potencia comeza cun modelo non lineal adecuado, que é responsabilidade do fabricante proporcionar. O tutorial menciona a importancia de revisar as follas de datos para obter especificacións clave e parámetros de deseño.

  • 00:30:00 - 00:35:00

    Os dispositivos de nitruro de galio (GaN) son destacados por ter unha maior densidade de potencia e eficiencia, e o tutorial presenta un caso de estudo utilizando un dispositivo GaN específico para deseñar un amplificador de potencia de 10 W a 2.4 GHz.

  • 00:35:00 - 00:40:00

    A análise de características DC e a selección do punto de polarización son pasos críticos no deseño, e o tutorial guía aos espectadores a través do proceso de simulación e análise para determinar as condicións óptimas de operación.

  • 00:40:00 - 00:45:00

    A análise de estabilidade é esencial para garantir que o amplificador funcione de maneira confiable, e o tutorial mostra como utilizar ferramentas de simulación para avaliar a estabilidade do dispositivo en diferentes frecuencias.

  • 00:45:00 - 00:52:28

    Finalmente, o tutorial conclúe a primeira parte do proceso de deseño, preparando aos espectadores para a seguinte fase, que incluirá o deseño de redes de adaptación de impedancia e optimización do amplificador.

Tampilkan lebih banyak

Peta Pikiran

Video Tanya Jawab

  • Qual é o objetivo deste tutorial?

    O objetivo é ensinar o design de amplificadores de potência, desde um dispositivo simples até um layout finalizado, incluindo validações para sinais modulados.

  • Quantas partes tem o tutorial?

    O tutorial é dividido em três partes.

  • O que será abordado na segunda parte?

    Na segunda parte, será abordado o design da rede de correspondência e a otimização do amplificador.

  • Por que a eficiência é importante em amplificadores de potência?

    A eficiência é crucial para reduzir custos operacionais e prolongar a vida útil da bateria em dispositivos portáteis.

  • Quais classes de operação de amplificadores são discutidas?

    As classes A, B, AB e C são discutidas, cada uma com suas vantagens e desvantagens.

  • Qual dispositivo é utilizado como exemplo no tutorial?

    Um dispositivo de nitreto de gálio (GaN) da Cree, o CGH 410, é utilizado como exemplo.

  • Por que os dispositivos GaN são populares?

    Os dispositivos GaN têm maior densidade de potência e eficiência em comparação com outras tecnologias.

  • O que é análise de carga?

    A análise de carga é um processo para determinar a impedância ideal para maximizar a eficiência e a potência de saída do amplificador.

  • Qual é a importância de um modelo não linear?

    Um modelo não linear adequado é essencial para prever o desempenho do amplificador durante a simulação.

  • O que é DPD?

    DPD significa pré-distorção digital, uma técnica usada para melhorar a linearidade do amplificador.

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Gulir Otomatis:
  • 00:00:01
    hello and welcome to RF design tutorials
  • 00:00:04
    this is tutorial 16 on practical power
  • 00:00:08
    amplifier Design This is a three-part
  • 00:00:10
    tutorial and the current video is part
  • 00:00:13
    one of the three remaining two videos
  • 00:00:16
    will be posted pretty soon on my YouTube
  • 00:00:19
    channel now uh objective of this
  • 00:00:22
    three-part tutorial series is to take
  • 00:00:24
    you through from a simple device to a
  • 00:00:27
    finalized power amplifier layout which
  • 00:00:30
    has been validated for One Tone twotone
  • 00:00:32
    as well as modulated signal analysis
  • 00:00:36
    including performing the digital
  • 00:00:38
    predistortion or dpd to obtain uh the
  • 00:00:41
    right specs which your PA needs U to be
  • 00:00:46
    you know used in any kind of wireless
  • 00:00:47
    communication whether it is bace station
  • 00:00:50
    um you know handheld terminal Bas PA
  • 00:00:53
    design
  • 00:00:54
    Etc now before we start subscribe to my
  • 00:00:57
    Channel Once you subscribed don't forget
  • 00:00:59
    to click on the Bell icon to enable all
  • 00:01:01
    the notifications and after you watch
  • 00:01:03
    the video kindly give it a thumbs up and
  • 00:01:05
    share it with your friends and
  • 00:01:07
    colleagues who may be interested in
  • 00:01:08
    watching similar
  • 00:01:10
    tutorial now as I talked about it will
  • 00:01:12
    be a three-part tutorial Series so here
  • 00:01:14
    is a quick snapshot of what you can
  • 00:01:16
    expect in each of the tutorial in part
  • 00:01:19
    one which is this tutorial we will get
  • 00:01:21
    started with PA design we will cover
  • 00:01:24
    these six Topics in sequence by which
  • 00:01:27
    you will by the end of this tutorial you
  • 00:01:28
    will have a good source and load
  • 00:01:31
    importance for this Creed device and
  • 00:01:33
    then in the second part of video we will
  • 00:01:35
    start with performing uh the matching
  • 00:01:38
    Network design in ideal matching Network
  • 00:01:40
    as well as then converting it to a micr
  • 00:01:42
    STP based representation and then we
  • 00:01:45
    will optimize the PA for fundamental and
  • 00:01:48
    harmonic performance and we will perform
  • 00:01:50
    the compression and two-tone analysis of
  • 00:01:52
    the PA after successful completion of
  • 00:01:55
    all these validation we will then
  • 00:01:57
    proceed to create a layout for the PA
  • 00:01:59
    and then perform em circuit code
  • 00:02:01
    simulation to do a final
  • 00:02:03
    validation now third part of the video
  • 00:02:06
    we'll talk about performing modulated
  • 00:02:08
    signal analysis because in today's
  • 00:02:11
    Wireless World it is not sufficient to
  • 00:02:13
    just do one tone or two tone based PA
  • 00:02:16
    validation because the the waveforms
  • 00:02:18
    which we are using today has a very high
  • 00:02:21
    PPR and with with a higher Peak to
  • 00:02:24
    average ratio compression it's always
  • 00:02:26
    good to do a modulated signal analysis
  • 00:02:29
    to really look and and see how the PA
  • 00:02:32
    will perform in a modulated condition
  • 00:02:35
    and we will finish off the third part or
  • 00:02:37
    this video series of PA design by doing
  • 00:02:40
    a digital pre-distortion simulations
  • 00:02:42
    inside ads to see how can we improve the
  • 00:02:45
    PA linearity to obtain a much better
  • 00:02:48
    performance U so that we can get
  • 00:02:51
    efficiency as well as a good linear
  • 00:02:53
    performance out of our PA design so
  • 00:02:56
    hopefully lot of exciting topics and uh
  • 00:02:59
    like me you are also excited uh to go
  • 00:03:02
    through this journey all right so if
  • 00:03:05
    you're ready to take the Deep dive
  • 00:03:06
    session uh nothing is you know pending
  • 00:03:09
    let's go straight into it now uh why do
  • 00:03:12
    we need power amplifier well power
  • 00:03:15
    amplifiers are in your transmitting
  • 00:03:17
    chain of any wireless system whether it
  • 00:03:18
    is a base station mobile phone and any
  • 00:03:21
    handheld device they final amplification
  • 00:03:24
    stage before your signal is transmitted
  • 00:03:27
    therefore they must produce enough
  • 00:03:28
    output power to overcome the channel
  • 00:03:31
    losses between transmitter and receiver
  • 00:03:34
    to make sure the link works um with the
  • 00:03:36
    best possible quality now PA is a
  • 00:03:40
    typically a primary consumer of power in
  • 00:03:44
    any transmitter so major design
  • 00:03:46
    requirement on a PA is how efficiently
  • 00:03:49
    your PA can convert DC power to the
  • 00:03:52
    output RF power now this efficiency uh
  • 00:03:55
    translates either into a lower operation
  • 00:03:58
    cost if you think about about a cellular
  • 00:04:00
    base station where 50% of your
  • 00:04:02
    electricity bill might be only due to
  • 00:04:05
    the PA operation or in terms of longer
  • 00:04:08
    battery life for a handheld device such
  • 00:04:10
    as our mobile phone we all will love to
  • 00:04:13
    have longer battery life so that we can
  • 00:04:15
    you know work on our phones much much
  • 00:04:17
    longer or watch videos and do various
  • 00:04:19
    things right p linearity is another
  • 00:04:22
    important requirement and in there the
  • 00:04:24
    input and output relationship must be as
  • 00:04:27
    linear as possible so that we can
  • 00:04:29
    preserve the signal Integrity of our
  • 00:04:32
    signal now these two often are very
  • 00:04:34
    conflicting requirement because ideally
  • 00:04:37
    you can either have a good linearity or
  • 00:04:39
    a good efficiency and a design of PA
  • 00:04:42
    often involves a tradeoff of efficiency
  • 00:04:44
    and linearity now if you recall my LNA
  • 00:04:47
    design tutorial video there the the
  • 00:04:50
    trade-off was between noise figure and
  • 00:04:53
    the impedance in the input uh written
  • 00:04:55
    law similarly in PA you have efficiency
  • 00:04:58
    and linearity which are our conflicting
  • 00:05:00
    requirement but we will see how how do
  • 00:05:02
    we tackle all these challenges and still
  • 00:05:04
    do a pretty good um Power Amplifier
  • 00:05:08
    design now in terms of class of
  • 00:05:10
    operation I'm I'm assuming all of you
  • 00:05:12
    already know about the basic theory of
  • 00:05:15
    uh Power amplifiers but still for the
  • 00:05:17
    sake of completion and making sure we
  • 00:05:19
    are all in sync I have a couple of
  • 00:05:21
    slides here so the typically uh Class A
  • 00:05:25
    operation is is like what you call as
  • 00:05:27
    midpoint operation where you buy your
  • 00:05:29
    transistor device at the midpoint or
  • 00:05:32
    what we call as idss by 2 and have a
  • 00:05:35
    full 360° conduction and here the
  • 00:05:39
    theoretical efficiency can be obtained
  • 00:05:42
    is as 50% however realistically you have
  • 00:05:45
    around
  • 00:05:46
    50% uh 20 to
  • 00:05:49
    25% my apologies so in class B you have
  • 00:05:52
    a lesser heating problem than Class A
  • 00:05:54
    because in class A you are operating
  • 00:05:56
    full 360° in class B we bias our device
  • 00:05:59
    at the cut off point so that you only
  • 00:06:01
    have 180° conduction so theoretically
  • 00:06:05
    efficiency can reach 78% but you will
  • 00:06:08
    have some crossover and Distortion
  • 00:06:09
    problem uh due to this hard clipping of
  • 00:06:12
    the PA now more practical class is class
  • 00:06:16
    AB which is in between Class A and B
  • 00:06:18
    that means your device will conduct
  • 00:06:20
    anywhere between 180° to 360° depending
  • 00:06:24
    on the bias point which you select as
  • 00:06:26
    shown in this um picture here so in this
  • 00:06:29
    class of operation your conversion
  • 00:06:31
    efficiency uh can reach somewhere close
  • 00:06:34
    to 50 to 60 or even 65% depending upon
  • 00:06:38
    how good uh devices and how good uh
  • 00:06:40
    design you can you can perform and
  • 00:06:43
    similarly you have class C uh class DF
  • 00:06:47
    uh kind of um you know applications and
  • 00:06:49
    each one of them have their own pros and
  • 00:06:52
    cons uh class DF are often called a
  • 00:06:55
    switched mode amplifier because we
  • 00:06:57
    intentionally Drive the device into
  • 00:07:00
    saturation like a square wave so devices
  • 00:07:03
    operates like a switch instead of
  • 00:07:05
    operating as a classical transistor now
  • 00:07:08
    this onoff nonlinear switching makes the
  • 00:07:10
    conduction angle almost to zero and
  • 00:07:12
    theoretically you can have 100%
  • 00:07:14
    efficiency in Practical there are many
  • 00:07:17
    design papers and references which show
  • 00:07:20
    around 70 to 75% of efficiency which can
  • 00:07:23
    be obtained from class F or inverted
  • 00:07:26
    class F kind of
  • 00:07:28
    amplifiers now uh if you want to learn
  • 00:07:30
    more about these classif operation and
  • 00:07:33
    how those that efficiency is obtained
  • 00:07:35
    and how can you you know set up those
  • 00:07:37
    analysis and simulations in ads on a
  • 00:07:40
    device level or on a theoretical level
  • 00:07:43
    my colleague Matt oelas has you know
  • 00:07:45
    posted plenty of um you know videos
  • 00:07:47
    around that topic and I'm providing this
  • 00:07:50
    link in the description U below this
  • 00:07:52
    video feel free to go and explore there
  • 00:07:54
    are a bunch of videos there which is
  • 00:07:56
    very going to be very very helpful and
  • 00:07:59
    in apart from these videos you also have
  • 00:08:02
    lot of um you know nonlinear stability
  • 00:08:04
    analysis which is another great feature
  • 00:08:06
    in new ads version uh whereby if you're
  • 00:08:10
    doing rfic or mmic kind of multi um you
  • 00:08:13
    know parallelized kind of amplifier
  • 00:08:16
    design they are going to be very helpful
  • 00:08:18
    allowing you to do a loop gain based St
  • 00:08:22
    nonlinear stability analysis so feel
  • 00:08:24
    free to explore on your own now any
  • 00:08:27
    design uh of a good PA always starts
  • 00:08:30
    with having a good nonlinear model and
  • 00:08:32
    it is vendor's responsibility to give
  • 00:08:35
    you a good nonlinear model now you can
  • 00:08:37
    obtain these models from depending on
  • 00:08:39
    which manufacturer you are using and in
  • 00:08:42
    this video if you want to follow all the
  • 00:08:44
    steps I have shown here I have obtained
  • 00:08:47
    this design kit from by registering on
  • 00:08:49
    cre website and again I will provide
  • 00:08:52
    this link in the description box so that
  • 00:08:54
    you can go and register yourself and uh
  • 00:08:57
    get the permission from tree to download
  • 00:08:59
    download their design kit and use it
  • 00:09:01
    inside Adas for your work now this
  • 00:09:04
    design kit apart from having this design
  • 00:09:07
    kit vendors can also give you data and
  • 00:09:09
    you know various other formats and in
  • 00:09:12
    case vendor is not helping you you can
  • 00:09:14
    have your own nonlinear model
  • 00:09:15
    development using tools like keyside IC
  • 00:09:18
    capap software which is again very very
  • 00:09:20
    popular tool to do your own device
  • 00:09:23
    modeling or you can use a measurement
  • 00:09:26
    based model such as X parameter which
  • 00:09:28
    can be extracted out of nonlinear Vector
  • 00:09:31
    Network analyzer offered by kyite but
  • 00:09:34
    again depending upon which vendor you
  • 00:09:36
    work with what's your application you
  • 00:09:38
    can figure out a way but again the
  • 00:09:40
    bottom line is you need to have a good
  • 00:09:42
    nonlinear model to have a good PA design
  • 00:09:46
    which is very predictable so that what
  • 00:09:48
    you simulate is what you are going to
  • 00:09:50
    see during the measurement now about Gan
  • 00:09:53
    devices because uh the device I'm going
  • 00:09:55
    to use from tree is a gan device and Gan
  • 00:09:58
    devices are very popular these days to
  • 00:10:00
    do PA design um mainly because they have
  • 00:10:03
    much higher power density compared to
  • 00:10:05
    other Technologies so have having higher
  • 00:10:08
    power density will allow you to generate
  • 00:10:11
    more power in a similar amount of area
  • 00:10:14
    as compared to Gallum arsenide also
  • 00:10:16
    those devices have a higher impedence
  • 00:10:19
    which will make your impedance matching
  • 00:10:20
    job much easier and they are higher
  • 00:10:23
    voltage devices which reduce the need to
  • 00:10:26
    do voltage conversion leading to higher
  • 00:10:28
    efficiency operations um you know as a
  • 00:10:31
    company or as a as a project now for
  • 00:10:34
    this tutorial I have taken this case
  • 00:10:37
    study and I'm going to use um a pretty
  • 00:10:39
    old K device but it's very popular and
  • 00:10:41
    very well matur device uh CGH
  • 00:10:45
    410 and now cre even has a second
  • 00:10:48
    generation or a newer device for the
  • 00:10:50
    same you know kind of um uh
  • 00:10:53
    specification extending the frequency up
  • 00:10:55
    to 8 gahz this particular device is U
  • 00:10:58
    for operation up to uh 6 GHz now we will
  • 00:11:02
    Target a word design for around 2.4 GHz
  • 00:11:06
    with plusus 100 MHz uh 10 wat output
  • 00:11:09
    power which is 40 dbm and these are the
  • 00:11:12
    gain and efficiency and efficiency I
  • 00:11:14
    would like to have more than 50% because
  • 00:11:17
    I'm going to do a class AB kind of
  • 00:11:20
    configuration for this um amplifi
  • 00:11:22
    tutorial ip3 I'm expecting around 45 dbm
  • 00:11:26
    or higher right pretty suitable now
  • 00:11:29
    don't get discouraged if you're doing 5
  • 00:11:31
    GHz 10 GHz kind of design all the
  • 00:11:34
    techniques I'm going to teach you in
  • 00:11:35
    this three-part tutorial cies are
  • 00:11:37
    equally applicable irrespective of your
  • 00:11:40
    frequency so even if you're doing a high
  • 00:11:42
    frequency U power amplifier design they
  • 00:11:45
    still are very very
  • 00:11:48
    valid now before we jump into you know
  • 00:11:51
    doing PA design it's always a good idea
  • 00:11:54
    to go through the data sheet which
  • 00:11:56
    manufacturer provides you and and while
  • 00:11:59
    going through the data sheet you know
  • 00:12:01
    keep uh looking out for some of these
  • 00:12:04
    specification because uh some of these
  • 00:12:06
    will give you the Baseline when you do
  • 00:12:09
    things like load pull for example so
  • 00:12:11
    refering to data sheet you will not
  • 00:12:13
    tentatively wear uh to set your source
  • 00:12:16
    and load impedances uh to reduce the
  • 00:12:19
    iterative effort which you sometime need
  • 00:12:20
    to do in load P to get to the right
  • 00:12:23
    point also these data sheets will give
  • 00:12:25
    you some demonstration uh circuit is
  • 00:12:28
    schematic and layout out it will give
  • 00:12:30
    you some initial idea of possible
  • 00:12:31
    circuit topology which you can expect or
  • 00:12:34
    which you can work on however it can
  • 00:12:37
    completely change based on how you
  • 00:12:38
    design but again it's still a very very
  • 00:12:41
    good reference so let's do that let's go
  • 00:12:43
    through this data sheet and look at some
  • 00:12:46
    of the key um you know specifications or
  • 00:12:49
    key you know figure of Merit now here's
  • 00:12:51
    the device which I'm using it's a 10 wat
  • 00:12:53
    device and that's what I'm designing the
  • 00:12:55
    amplifier for a DC to 6 GHz it's a
  • 00:12:59
    gallium nitrate as I talked about now if
  • 00:13:02
    you look at a small signal gain around
  • 00:13:05
    the frequency which we are working is
  • 00:13:07
    around 16 DB which is pretty good and a
  • 00:13:10
    13 wat typical saturated power so
  • 00:13:13
    usually for Gan devices it's like a 3db
  • 00:13:16
    you know saturated power what they
  • 00:13:18
    mention 65% efficiency at Pat and
  • 00:13:23
    usually the vendors will always mention
  • 00:13:26
    train efficiency not the power added
  • 00:13:28
    efficiency see so as a designer you need
  • 00:13:30
    to distinguish it very very carefully
  • 00:13:33
    now usual power Amplified specs are
  • 00:13:36
    written for power added efficiency which
  • 00:13:38
    will be slightly lower than the drain
  • 00:13:40
    efficiency and it's recommended for 20
  • 00:13:43
    volt oper 28 volt operation which is
  • 00:13:45
    perfect what we are trying to do and
  • 00:13:48
    also in terms of application if you look
  • 00:13:50
    at it is applicable for Broadband
  • 00:13:53
    cellular Class A ab and Linear Amplifier
  • 00:13:56
    suitable for ofdm and that's perfectly
  • 00:13:59
    what we want because we want to do class
  • 00:14:01
    AB amplifier design for 5G application
  • 00:14:05
    which is typically an ofdm system all
  • 00:14:08
    right so that's the first thing and then
  • 00:14:09
    you get your DC uh operating points and
  • 00:14:12
    DC conditions and here's your typical
  • 00:14:16
    range for uh the gate um you know bias
  • 00:14:19
    and I'm going to use minus 2.7 anyways
  • 00:14:22
    but we'll figure out uh how did I arrive
  • 00:14:25
    at minus 2.7 volt not only by looking at
  • 00:14:28
    the data sheet but actually doing the IV
  • 00:14:31
    characteristics now let's scroll down
  • 00:14:34
    and there are various plots of
  • 00:14:36
    compression gain and and all that but
  • 00:14:39
    let me reach to this point so at this
  • 00:14:42
    you know page here you can see uh vendor
  • 00:14:45
    is recommending or providing information
  • 00:14:48
    about the the best possible source and
  • 00:14:50
    load impedances versus frequency for
  • 00:14:54
    getting the best possible power but
  • 00:14:56
    again uh remember these um imp idence
  • 00:14:59
    specification are always mentioned with
  • 00:15:02
    respect to um you know the the bias
  • 00:15:06
    condition and if you change it bias
  • 00:15:08
    condition they may not be valid but
  • 00:15:10
    again it's a good reference or good
  • 00:15:12
    reference point so Z Source um around
  • 00:15:15
    our frequency you know an aggregate
  • 00:15:18
    magnitude is around 5 ohm and if you
  • 00:15:21
    look at about load is around 20 ohm or
  • 00:15:23
    so so that's a pretty good Baseline and
  • 00:15:26
    this information will be very useful
  • 00:15:28
    when we reach u a load uh load pull
  • 00:15:31
    point so keep take a note of this uh
  • 00:15:34
    here all right similarly if we go keep
  • 00:15:37
    going further down you can see a demo
  • 00:15:39
    board which vendor can also give you and
  • 00:15:42
    you see how the PA is mounted and this
  • 00:15:45
    is how typically how all high power PAs
  • 00:15:49
    will be assembled so you will have a
  • 00:15:51
    metal flange and you will Mount this
  • 00:15:53
    device directly on that flange and now
  • 00:15:56
    there are two kind of packages which Fe
  • 00:15:58
    es available one could be a screw down
  • 00:16:01
    type package another could be like a
  • 00:16:03
    solder kind of package but that's pretty
  • 00:16:05
    popular way of doing the P assembly
  • 00:16:08
    because you don't want this high power
  • 00:16:10
    to be consumed on top of PCB uh like how
  • 00:16:13
    can we Mount the device for low power or
  • 00:16:16
    the medium power or LNA uh kind of
  • 00:16:19
    application and also um you know how do
  • 00:16:21
    you do this PCB design is very
  • 00:16:23
    subjective I have seen um you know many
  • 00:16:26
    designers they keep the input part of
  • 00:16:28
    the PCB and output part of the PCB
  • 00:16:31
    completely separate and they have this
  • 00:16:34
    flange going all the way down or
  • 00:16:36
    sometime you can have the single PCB
  • 00:16:38
    with a cutout for this device mounting
  • 00:16:41
    so again it's user Choice uh nothing is
  • 00:16:43
    good or bad it depends how you would
  • 00:16:46
    like to you know implement it now if we
  • 00:16:49
    go to the next page here we can see a
  • 00:16:52
    picture of a demo amplifier circuit is
  • 00:16:54
    schematic and it gives you some basic
  • 00:16:56
    idea about the kind of decoupling uh
  • 00:16:59
    they have used uh the input matching and
  • 00:17:01
    the stability Network and as well as the
  • 00:17:03
    output matching network uh for the PA
  • 00:17:07
    now lot of time you don't need to
  • 00:17:08
    blindly follow these many capacitors um
  • 00:17:11
    and all that because usually vendors
  • 00:17:13
    will always do a Broadband you know kind
  • 00:17:16
    of board design and they will
  • 00:17:19
    overcompensate um you know by putting
  • 00:17:21
    lot of extra things to make sure the
  • 00:17:24
    device shows as good performance as as
  • 00:17:27
    possible but in real application you you
  • 00:17:30
    really may not need these many bypass
  • 00:17:32
    capacitors and so on but again that
  • 00:17:35
    decision is left to designer depending
  • 00:17:37
    upon how noisy they expect their power
  • 00:17:39
    supplies to be and accordingly they can
  • 00:17:41
    take a call but a good point to to note
  • 00:17:44
    here uh the lowest um capacitance which
  • 00:17:47
    is means the higher frequency U will
  • 00:17:50
    always be closest to your you know
  • 00:17:53
    transistor the the bigger value or the
  • 00:17:55
    biggest value will always be closer to
  • 00:17:57
    the D
  • 00:17:58
    so that it can compensate for a low
  • 00:18:01
    frequency humming which might be you
  • 00:18:04
    know coming via power supply all right
  • 00:18:07
    so that gives us some idea initial idea
  • 00:18:09
    what to expect you can see some cies
  • 00:18:11
    resistance here used to stabilize the
  • 00:18:13
    device although it's pretty big value uh
  • 00:18:15
    which I would like to avoid personally
  • 00:18:18
    and then there are a couple of
  • 00:18:19
    placeholders as zero ohm resistors which
  • 00:18:22
    which can be used in case it is
  • 00:18:24
    necessary and then you have some
  • 00:18:26
    coupling capacitors here all right so
  • 00:18:29
    that's good enough information so always
  • 00:18:31
    keep um you know pay equal attention to
  • 00:18:33
    the data sheet because as I said you can
  • 00:18:36
    get a lot of useful information coming
  • 00:18:37
    out of this data sheet which serves as a
  • 00:18:40
    baseline uh for your real circuit design
  • 00:18:44
    now let's directly jump in to ads here
  • 00:18:48
    so in ads we um we are going to talk
  • 00:18:50
    about this part one and I will take you
  • 00:18:54
    to all the key steps which I mentioned
  • 00:18:57
    in the in the OR additional slide here
  • 00:18:59
    so let me go back to that slide so that
  • 00:19:01
    we can keep track all right so in part
  • 00:19:03
    one uh I already provided you about the
  • 00:19:06
    introduction and classif operation now
  • 00:19:09
    let's start with our second step where
  • 00:19:12
    we are going to perform DCI
  • 00:19:14
    characteristics and a bias Point
  • 00:19:16
    analysis for our device now here with
  • 00:19:19
    this uh template um I already covered
  • 00:19:22
    all these uh videos how to perform dciv
  • 00:19:26
    simulation how to perform stability
  • 00:19:28
    analysis in my previously posted videos
  • 00:19:31
    so I'm assuming that you have seen all
  • 00:19:33
    those tutorial videos already if you
  • 00:19:36
    have not please go ahead and see those
  • 00:19:38
    videos first before you continue with
  • 00:19:40
    this um you know uh topic here because
  • 00:19:43
    very difficult to explain all those
  • 00:19:45
    Basics when we are talking about how to
  • 00:19:47
    do a power amplifier design right so
  • 00:19:50
    here the template I have used um can be
  • 00:19:53
    obtained from insert template and here I
  • 00:19:55
    have used a fit uh curv Tracer template
  • 00:19:58
    which I already talked about in the
  • 00:20:00
    earlier video so once you have the
  • 00:20:02
    template you click okay you will have a
  • 00:20:04
    skeleton something like this available
  • 00:20:06
    on your schematic and now you can
  • 00:20:08
    connect your device uh from the library
  • 00:20:11
    so here you can see on the left hand
  • 00:20:13
    side I have install the key uh cre
  • 00:20:15
    library and how do we install Library uh
  • 00:20:18
    or window Library into Adas well you can
  • 00:20:21
    go to design kit manage library and
  • 00:20:24
    browse to the location where you have
  • 00:20:26
    kept the lip. def or where you have
  • 00:20:29
    unarchived the the library which you
  • 00:20:32
    obtained from vendor's website right so
  • 00:20:36
    here all these Basics are already
  • 00:20:38
    covered but I just gave you a refresher
  • 00:20:40
    so here you can see the CGH 400 uh one Z
  • 00:20:44
    device this is my gate bias from min-2
  • 00:20:48
    to minus 4 pretty much like how it was
  • 00:20:50
    referred in data sheet and here is the
  • 00:20:52
    drain bias now notice in drain bias I'm
  • 00:20:56
    sweeping from 0 to 7 70 volts while this
  • 00:21:00
    device is only 28 volts so somebody
  • 00:21:02
    might be wondering why are we going to
  • 00:21:04
    70 volt well a good tip always in power
  • 00:21:08
    amplifier because you are going to plot
  • 00:21:10
    the load line and and and those kind of
  • 00:21:12
    stuff it's always recommended to sweep
  • 00:21:15
    the train voltage at least two times of
  • 00:21:17
    your desired operating voltage and I'm
  • 00:21:20
    going to use 28 volt so ideally I should
  • 00:21:23
    have gone to 56 volt but anything extra
  • 00:21:26
    which you add it's it's more than
  • 00:21:28
    welcome all right so let's go ahead and
  • 00:21:30
    perform simulation and now we will have
  • 00:21:33
    a data display with this template now as
  • 00:21:36
    I talked about earlier my colleague
  • 00:21:38
    matelis has those PA videos and I'm
  • 00:21:43
    operating you know using one of the
  • 00:21:45
    templates which is provided in his um
  • 00:21:49
    you know first session which is Class A
  • 00:21:51
    ab and B um you know uh tutorial so once
  • 00:21:56
    I obtain the workspace I'm only using
  • 00:21:58
    the one of the data display templates
  • 00:22:01
    because it has lot of equation already
  • 00:22:04
    implemented which makes my job easier
  • 00:22:06
    now here one marker is posted on idss
  • 00:22:09
    point as you would expect and the based
  • 00:22:11
    on the second marker you will have
  • 00:22:13
    voltage and current waveforms the power
  • 00:22:16
    dissipation and this table showing you
  • 00:22:18
    the output power small signal gain large
  • 00:22:21
    signal gain efficiency uh DC current
  • 00:22:25
    conduction angle duty cycle all these
  • 00:22:27
    things are updated now notice uh usually
  • 00:22:30
    you will obtain this voltage and current
  • 00:22:32
    waveforms by doing a harmonic balance
  • 00:22:34
    simulation but here uh using the
  • 00:22:36
    equation uh which my colleague has
  • 00:22:39
    implemented we are able to estimate all
  • 00:22:41
    those uh from the load line based design
  • 00:22:45
    equation so they are estimation they are
  • 00:22:47
    not exactly what harmonic balance will
  • 00:22:50
    show show you but it's a very very good
  • 00:22:52
    and accurate um you know um post
  • 00:22:55
    processing now based on where you keep
  • 00:22:57
    keep your you know operating condition
  • 00:23:00
    with marker two you can see the waveform
  • 00:23:02
    is changing the conduction angle is
  • 00:23:04
    changing and rest of the parameters are
  • 00:23:06
    changing so if I operate my device on
  • 00:23:09
    class P um you know where you have
  • 00:23:12
    conduction angle of 180° you can see the
  • 00:23:15
    efficiency goes up and here is the power
  • 00:23:17
    consumption which is only happening due
  • 00:23:19
    to this 180° uh conduction of your of
  • 00:23:22
    your current and it's clipping um in
  • 00:23:26
    half of the cycle but again so depending
  • 00:23:29
    upon where you place it for example if I
  • 00:23:31
    place it in class A configuration you
  • 00:23:33
    can see conduction angle is 360° and you
  • 00:23:36
    have the full 360° current and voltage
  • 00:23:39
    and then power dissipation is all
  • 00:23:41
    continuous right so based on my
  • 00:23:44
    understanding referring to data sheet I
  • 00:23:46
    have uh selected 28 volt uh operation
  • 00:23:50
    with minus 2.7 uh es gate voltage which
  • 00:23:54
    will um you know approximate it to give
  • 00:23:57
    me large signal gain of 12 DB and if you
  • 00:24:00
    remember our spec we wanted gain of more
  • 00:24:02
    than 10 DB which is pretty good the
  • 00:24:05
    efficiency is close to
  • 00:24:07
    46% as estimated by just simply the DC
  • 00:24:11
    analysis but once we do load pull and we
  • 00:24:14
    find the right um you know Optimum load
  • 00:24:16
    operating point this efficiency will
  • 00:24:19
    easily cross over 50% no problem and
  • 00:24:22
    also the output power predictor is
  • 00:24:24
    around 36 dbm and again with the right
  • 00:24:27
    you know power match impedence matching
  • 00:24:30
    we would be able to get easily more than
  • 00:24:32
    40 uh DPM so it's all in all it's a
  • 00:24:35
    pretty good operating point where I am
  • 00:24:38
    expecting to have 256 de of conduction
  • 00:24:42
    angle which results in around 70% of
  • 00:24:45
    duty cycle so that finishes step number
  • 00:24:48
    one of finding the right DC operating
  • 00:24:51
    Point uh for your power device now we
  • 00:24:55
    take that information and we Pro proceed
  • 00:24:58
    to next step so what's our next step is
  • 00:25:01
    to perform the stability analysis right
  • 00:25:04
    so in a stability
  • 00:25:05
    analysis uh here I'm using uh instrument
  • 00:25:09
    kind of look and feel and this kind of
  • 00:25:12
    component can be obtained uh from going
  • 00:25:15
    to simulation instrument pallet and here
  • 00:25:18
    I do have this SP uh Network analyzer or
  • 00:25:22
    NWA component which will give you look
  • 00:25:24
    and feel of network analyzer and you
  • 00:25:27
    have of input and output to be connected
  • 00:25:30
    and the bias is inside and you can just
  • 00:25:32
    set these parameters which you want now
  • 00:25:35
    internally you know it's just a visual
  • 00:25:37
    appeal but internally is the is the same
  • 00:25:40
    kind of bench which you uh will end up
  • 00:25:43
    creating yourself you can see there's
  • 00:25:46
    input termination DC block DC feed and
  • 00:25:49
    you have V bias 1 V bias 2 and that's
  • 00:25:52
    where your device will get connected uh
  • 00:25:54
    here all right so just for the you know
  • 00:25:57
    sake of iand or introducing you to a new
  • 00:26:01
    kind of virtual instrument which you can
  • 00:26:03
    get in areas so I connected this device
  • 00:26:06
    um we will set the same bias which we
  • 00:26:09
    computed of minus 2.7 volt to 28 volt
  • 00:26:13
    and I'm going to analyze this device
  • 00:26:15
    from .5 GHz to 6 GHz which is the
  • 00:26:19
    maximum frequency recommended now here
  • 00:26:21
    I'm using some data display templates um
  • 00:26:24
    because I don't want to even you know
  • 00:26:27
    prepare more own graphs or write some
  • 00:26:29
    equations to to calculate the stability
  • 00:26:32
    Factor Etc now how can you get access to
  • 00:26:35
    this uh kind of data display template
  • 00:26:37
    well if you go to any Simulator for
  • 00:26:39
    example as parameter or anything you
  • 00:26:42
    have this component here called display
  • 00:26:44
    template if you place this display
  • 00:26:47
    template component onto schematic you
  • 00:26:49
    can double click and you can browse to
  • 00:26:52
    installed templates and under product
  • 00:26:56
    you will have lot of these preconfigured
  • 00:26:59
    templates which you can use and all of
  • 00:27:02
    them are like data display templates
  • 00:27:04
    where they will have certain number of
  • 00:27:06
    plots or equations written already to do
  • 00:27:09
    your job so from the list available I'm
  • 00:27:12
    using S21 plot uh network analysis plot
  • 00:27:15
    and also the the stability Circle and
  • 00:27:19
    the you know gain stability circles Etc
  • 00:27:22
    so see what happens once I have this
  • 00:27:24
    template and if I perform the simulation
  • 00:27:27
    I get all these kind of plots and if you
  • 00:27:30
    refer at the bottom uh here we get
  • 00:27:32
    multiple tabs uh depending on the
  • 00:27:35
    templates I'm using so here one page per
  • 00:27:38
    template and we can look at the
  • 00:27:40
    stability circles and you can clearly
  • 00:27:43
    see your device is not stable at the the
  • 00:27:47
    2.4 GHz where my marker is or where my
  • 00:27:51
    frequency selector marker is and if I
  • 00:27:53
    change this marker you will see those
  • 00:27:55
    stability Circle points change change
  • 00:27:58
    and it shows you uh what kind of
  • 00:28:00
    stability performance you have for that
  • 00:28:02
    device so obviously uh you know till
  • 00:28:05
    around 4 gahz you can see I'm less than
  • 00:28:09
    U you know factor of one with mu load or
  • 00:28:12
    mu source and if any one of them is
  • 00:28:14
    greater than one my device will become
  • 00:28:16
    unconditionally stable and also the role
  • 00:28:19
    at stability factor or what you call as
  • 00:28:21
    K is less than one so clearly our device
  • 00:28:24
    is not stable at around 2.4 GHz so let
  • 00:28:28
    me place this marker closer to
  • 00:28:31
    2.4 GHz here and you can see the
  • 00:28:35
    stability circles are cutting the SM
  • 00:28:38
    chart now how to stabilize the device
  • 00:28:40
    again taking Q from the from the data
  • 00:28:44
    sheet um I knew there is a series
  • 00:28:47
    resistor which can be placed to
  • 00:28:49
    stabilize this device now like we
  • 00:28:52
    discussed in LNA video where I said
  • 00:28:55
    don't place any resistive device at the
  • 00:28:57
    input of the transistor because in case
  • 00:29:00
    of LNA it affects your noise figure
  • 00:29:02
    performance it distorts it in case of
  • 00:29:05
    power amplifier uh try avoiding placing
  • 00:29:08
    any resistive component in the output
  • 00:29:11
    stage or in the drain terminal because
  • 00:29:14
    that will suck up all the gain which you
  • 00:29:16
    have obtained by some amount and it's in
  • 00:29:19
    power stages it's very difficult to
  • 00:29:21
    obtain gain and anything which you have
  • 00:29:23
    obtained you would not like to sacrifice
  • 00:29:26
    by putting a resistor plus that resistor
  • 00:29:29
    will need to be of much higher wattage
  • 00:29:32
    because you're are going to produce a
  • 00:29:33
    higher power so it's always a good
  • 00:29:36
    choice to place a resistor at the input
  • 00:29:38
    of any power amplification device now
  • 00:29:42
    with this 5 Ohm resistor if we go ahead
  • 00:29:44
    and perform simulation now you can see
  • 00:29:48
    uh my stability factor is greater than
  • 00:29:51
    one and it's actually greater than two
  • 00:29:54
    and now the load and and Source
  • 00:29:56
    stability circles are are outside the
  • 00:29:58
    smart that means at around 2.4 GHz my
  • 00:30:01
    device is unconditionally stable and
  • 00:30:04
    actually um if you look at here from 1
  • 00:30:07
    gahz onwards your device is a Broadband
  • 00:30:10
    stable so if you have to work in
  • 00:30:12
    anywhere in this zone now you can
  • 00:30:15
    confidently go and design your matching
  • 00:30:17
    network is already you know kind of
  • 00:30:20
    stabilized all right so that was step
  • 00:30:22
    number two so we worked on and
  • 00:30:24
    stabilized our device at the operator
  • 00:30:27
    region we are working at and we only Ed
  • 00:30:30
    5 Ohm resistor now when we use 5 Ohm
  • 00:30:33
    resistor it's not only a you know good
  • 00:30:35
    idea to only keep looking at stability
  • 00:30:38
    Factor you need to be also concerned
  • 00:30:40
    with how much cane has dropped due to
  • 00:30:43
    that resistor and here if you look at
  • 00:30:46
    this parameter performance and if I
  • 00:30:49
    place a marker around 2.4 gahz I can see
  • 00:30:53
    I have an unmatched gain of around 11 DP
  • 00:30:56
    which is pretty pretty good and it's a
  • 00:30:58
    small signal gain and once I do
  • 00:31:00
    impedence matching Etc my gain will be
  • 00:31:03
    even more and my requirement is anyway
  • 00:31:05
    to have more than 10 DB gain so that's
  • 00:31:09
    pretty good so my resistor hasn't
  • 00:31:11
    affected too much of my performance but
  • 00:31:14
    it has a stabilized my device good
  • 00:31:17
    enough all right so let's go ahead into
  • 00:31:20
    the next stage of our PA design process
  • 00:31:24
    and the next stage obviously is to
  • 00:31:26
    perform a load pull right and I already
  • 00:31:30
    posted three videos on load pull please
  • 00:31:33
    um make sure you watch the load poo
  • 00:31:35
    videos before you continue here because
  • 00:31:37
    I'm not going to explain the
  • 00:31:38
    fundamentals of load p and how do you
  • 00:31:41
    understand data from load pull now the
  • 00:31:44
    template which I'm using here is simply
  • 00:31:46
    obtained as I demonstrated in tutorial
  • 00:31:48
    videos by going to design guide load
  • 00:31:51
    pull one tone load pull and constant
  • 00:31:54
    available Source power because that's
  • 00:31:56
    always your getting started load pull
  • 00:31:59
    now once you bring out this template I
  • 00:32:01
    have connected the stabilized device
  • 00:32:04
    provided the right DC bias as we uh
  • 00:32:07
    finalized the RF power is 2400 mahz now
  • 00:32:12
    output power which I'm expecting is 40
  • 00:32:14
    TBM and we just noted the gain is around
  • 00:32:17
    11 DB or so so the input power I have
  • 00:32:21
    decided to feed is 29
  • 00:32:23
    dbm now the Z load uh fundamental is
  • 00:32:27
    kept around 20 ohm and where we got this
  • 00:32:30
    information from well remember this data
  • 00:32:33
    sheet there was a page where you had the
  • 00:32:36
    the source and a load impotance divided
  • 00:32:38
    here so I just selected 20 ohm as um you
  • 00:32:42
    know one of the points and also remember
  • 00:32:44
    this Z Source fundamental I kept it as 5
  • 00:32:48
    ohm so again in this data sheet if you
  • 00:32:51
    refer to that's the kind of U you know
  • 00:32:53
    impedence you looking at so even if you
  • 00:32:56
    know the vendor is not giving you uh the
  • 00:32:59
    source impedence information for some
  • 00:33:00
    reason for any Gan device selecting 5 to
  • 00:33:03
    10 ohms is always a good choice and if
  • 00:33:07
    you are using LD Moss again 5 ohm or so
  • 00:33:10
    is kind of good choice there right but
  • 00:33:13
    more information you can get um from the
  • 00:33:16
    data sheet is always better now the
  • 00:33:18
    second and third harmonic of the load I
  • 00:33:21
    have you know terminated into open
  • 00:33:23
    circuit or you can decide to terminate
  • 00:33:25
    into a short circuit yeah and so that we
  • 00:33:28
    can look at the fundamental performance
  • 00:33:31
    there or you can even perform harmonic
  • 00:33:34
    load pull all those templates are
  • 00:33:36
    already available uh there but when you
  • 00:33:38
    are starting with your first um you know
  • 00:33:41
    load pull is always good idea to
  • 00:33:43
    terminate it either in a open circuit or
  • 00:33:46
    a short circuit now once we go ahead and
  • 00:33:48
    perform this load pull we can see um The
  • 00:33:52
    Contours and here um you know uh we can
  • 00:33:55
    see we have we are able to achieve more
  • 00:33:58
    than 40 dbm of power from our device and
  • 00:34:02
    efficiency which is much higher than 50%
  • 00:34:05
    so probably it was a good Zone to
  • 00:34:07
    perform load pull so we already have all
  • 00:34:10
    the data here again as we discuss in
  • 00:34:12
    load pool video you have the condition
  • 00:34:15
    which is giving you the maximum power as
  • 00:34:17
    well as cane which is around 12.5 DB and
  • 00:34:21
    also the operating condition which can
  • 00:34:23
    give you the maximum pae and these are
  • 00:34:26
    the load points where you can vary the
  • 00:34:28
    marker and see the operating condition
  • 00:34:31
    pae uh output power and so on now here
  • 00:34:35
    you have a decision to make because
  • 00:34:38
    using the load pull which we perform we
  • 00:34:41
    are able to get uh the desired output
  • 00:34:43
    power as well as efficiency so you can
  • 00:34:46
    either use this um impedence
  • 00:34:48
    specification of said load and you can
  • 00:34:51
    see it is also giving you the input
  • 00:34:53
    impedence so you really don't need to
  • 00:34:55
    perform a source pull in order to get
  • 00:34:58
    you the best gain or to find the right
  • 00:35:00
    source impedence for your PA Design One
  • 00:35:03
    template is giving you everything
  • 00:35:05
    because often I get a query how to do
  • 00:35:07
    Source pull Etc if you want to do Source
  • 00:35:10
    P the template is available but Frankly
  • 00:35:12
    Speaking you really don't need to unless
  • 00:35:15
    there is a you know something which is
  • 00:35:17
    not you know um given to you by this
  • 00:35:20
    template so again if even if you look at
  • 00:35:22
    the maximum pae operation which is
  • 00:35:24
    around 65% yes still able to get very
  • 00:35:27
    close to what you're looking at in terms
  • 00:35:30
    of output power so you can either select
  • 00:35:33
    this Z load and Z Source combination or
  • 00:35:36
    you can select this uh Z source and Z
  • 00:35:39
    load combination and you can proceed for
  • 00:35:42
    impedance matching Network design from
  • 00:35:44
    here but the question is uh is it uh
  • 00:35:48
    recommended to go directly jump into
  • 00:35:50
    impedence matching because you are able
  • 00:35:53
    to operate the output power but right
  • 00:35:55
    now you don't know how much DB
  • 00:35:56
    compression you are operating on you
  • 00:35:59
    don't know how much IMD uh level you are
  • 00:36:01
    going to get Etc so again depending upon
  • 00:36:05
    what you are looking for you can go back
  • 00:36:08
    to adss schematic and you can utilize
  • 00:36:11
    the other templates which I also talked
  • 00:36:13
    about in the early video so you can
  • 00:36:16
    sweep the available Source power you can
  • 00:36:18
    see how much compression level you are
  • 00:36:20
    working at you can display Contours at a
  • 00:36:23
    specific xtb compression point and if
  • 00:36:27
    acpr or evm is your concern you can also
  • 00:36:30
    plot Contours of acpr or evm at a
  • 00:36:34
    specific output power or at a specific
  • 00:36:38
    xtb gain compression similarly you can
  • 00:36:41
    even do two-tone uh load pull simulation
  • 00:36:44
    because if IMD is your Prime concern you
  • 00:36:47
    can also get IMD Contours if you do two
  • 00:36:50
    to on load P but here I'm showing you a
  • 00:36:53
    way how to how to avoid doing all those
  • 00:36:56
    and directly utilize the latest
  • 00:36:59
    available templates to still get your
  • 00:37:01
    job done before you end up confusing
  • 00:37:04
    yourself but this fundamental load pull
  • 00:37:06
    was very important because we need to
  • 00:37:08
    make sure we have the right power as
  • 00:37:11
    well as right efficiency all right so we
  • 00:37:13
    got this information we got our area
  • 00:37:16
    where we need to work on now what's the
  • 00:37:18
    next step to do your PA design or to
  • 00:37:21
    progress with your PA design now
  • 00:37:23
    remember in the last load pull tutorial
  • 00:37:26
    video I showed you how to use graphical
  • 00:37:29
    methods of um Computing the recommended
  • 00:37:32
    load points and then we use those load
  • 00:37:36
    points into an xdb compression template
  • 00:37:40
    and I also provided a knowledge center
  • 00:37:42
    link for you to download uh the
  • 00:37:44
    workspaces created by my colleague Andy
  • 00:37:47
    Howard so I'm using one of those
  • 00:37:50
    templates which I demonstrated in the
  • 00:37:52
    last video here I already used the
  • 00:37:55
    graphical loot pull uh method because I
  • 00:37:58
    I knew from my first load pull
  • 00:38:00
    simulation which zone to look at now I
  • 00:38:03
    went to that zone selected the area and
  • 00:38:06
    I exported only those load points and as
  • 00:38:10
    an MDF file and now I'm going to perform
  • 00:38:14
    load pull only on those uhu you know
  • 00:38:16
    points as necessary which could be a
  • 00:38:19
    much a smaller zone now for this load
  • 00:38:22
    pull I have terminated my source idence
  • 00:38:25
    to the complex conjugate of what we
  • 00:38:28
    calculated in the earlier uh you know
  • 00:38:31
    analysis of load pull because this will
  • 00:38:33
    give you the maximum gain if you
  • 00:38:35
    terminate your Source ter you know um
  • 00:38:39
    Source termination into the complex
  • 00:38:41
    conjugate of what you obtain from the
  • 00:38:43
    load pool now input power I'm selecting
  • 00:38:47
    as 28 dbm and 3db is my target operating
  • 00:38:51
    range rest of the parameters is already
  • 00:38:54
    set now as we we discussed we can start
  • 00:38:57
    optimization and now this template will
  • 00:39:00
    make sure all the Contours all the data
  • 00:39:03
    shown to you in the load pool only
  • 00:39:06
    belongs to around 3db compression
  • 00:39:09
    characteristics so it will filter out
  • 00:39:12
    everything which is highly compressed or
  • 00:39:14
    which is under compressed it is only
  • 00:39:16
    going to give me the details which are
  • 00:39:20
    relevant for me to get to a 3db
  • 00:39:23
    compression point now if you're looking
  • 00:39:25
    to do 1db compression Point based design
  • 00:39:28
    feel free to change it to one and then
  • 00:39:31
    you can still use the same template as
  • 00:39:33
    it is there is no change there but
  • 00:39:35
    typically in G amplifiers we we talk
  • 00:39:38
    about 3dp you know kind of gain
  • 00:39:41
    compression value so this will take few
  • 00:39:43
    seconds for uh for the simulation to run
  • 00:39:46
    but again as you can see I have simply
  • 00:39:48
    inserted uh my cre device along with my
  • 00:39:52
    stability resistor and nothing else has
  • 00:39:55
    to be changed so it's like just drop in
  • 00:39:57
    your device um you know set up some key
  • 00:40:00
    parameters and you hit the optimization
  • 00:40:03
    button and let ads do your job so now
  • 00:40:05
    the simulation is finished now I will
  • 00:40:08
    have a data display showing me the the
  • 00:40:11
    right format of data or the value which
  • 00:40:14
    I'm really interested in so here in the
  • 00:40:17
    center you can see the Contours
  • 00:40:20
    belonging to 3db operating condition of
  • 00:40:23
    this device here is the efficiency and
  • 00:40:26
    here is the various power levels of
  • 00:40:28
    various Contours and also gain you can
  • 00:40:31
    see is around 13 TB which is which is
  • 00:40:34
    kind of pretty good uh obtain now the
  • 00:40:37
    final information is simply contained in
  • 00:40:40
    the tables uh which are shown here the
  • 00:40:43
    red one is showing you the maximum pae
  • 00:40:46
    operation and the blue one showing you
  • 00:40:48
    power delivery again I already discuss
  • 00:40:50
    all of this in the previous load poool
  • 00:40:53
    tutorials so take away from me here
  • 00:40:55
    again for a 3db operation where I'm
  • 00:40:58
    getting more than 40 dbm power and
  • 00:41:01
    efficiency of around
  • 00:41:03
    57% this is my Zed load which I need to
  • 00:41:06
    design impedance matching for and this
  • 00:41:08
    is the Z in for which I need to do the
  • 00:41:11
    input in input impedence matching
  • 00:41:14
    Network and again if you want to go
  • 00:41:16
    behind highest deficiency which is
  • 00:41:18
    66% and even you go behind it you can
  • 00:41:22
    see you are still able to operate you
  • 00:41:24
    know get more than 40 DB M so these are
  • 00:41:27
    your impedence matching um you know
  • 00:41:29
    targets and again both of them are
  • 00:41:31
    pretty close so there is nothing more so
  • 00:41:33
    which is a good sign that this device
  • 00:41:35
    will give me the best possible
  • 00:41:38
    efficiency with the best possible output
  • 00:41:40
    power and I would be able to meet my
  • 00:41:43
    design requirements by a by a good
  • 00:41:45
    amount and also the large signal gain is
  • 00:41:48
    is more than 12 DB against my target of
  • 00:41:51
    10 DB which is again a good news for me
  • 00:41:54
    so all in all pretty good so I got my
  • 00:41:57
    load impedence as well as Source
  • 00:41:59
    impedence uh from this analysis now what
  • 00:42:02
    do we need to do next what are you going
  • 00:42:05
    to do next well the next requirement of
  • 00:42:08
    course is to do impedence matching now
  • 00:42:11
    before we go into impedence matching
  • 00:42:14
    which actually will lead us to the
  • 00:42:16
    second part of this video or second
  • 00:42:18
    tutorial which I will post in next few
  • 00:42:21
    days before we go there just one final
  • 00:42:24
    step which I always like to
  • 00:42:26
    do is to create this kind of schematic
  • 00:42:29
    where I check my impedence matching
  • 00:42:32
    requirement and I perform harmonic
  • 00:42:34
    balance simulation as well as as
  • 00:42:36
    parameter simulation just to get a sense
  • 00:42:39
    of how a perfectly matched power
  • 00:42:42
    amplifier would look like for me all
  • 00:42:45
    right so in this case rest everything is
  • 00:42:47
    still the same I have the same um RF
  • 00:42:51
    frequency you know bias condition input
  • 00:42:54
    power is set as per what we just now
  • 00:42:56
    from load pull and notice these two
  • 00:42:59
    variables here Zs is set to the complex
  • 00:43:03
    conjugate of what we just obtained
  • 00:43:06
    always remember that whatever load pull
  • 00:43:08
    gives you you need to do a complex
  • 00:43:10
    conjugate of this and use that number in
  • 00:43:13
    your Source termination the load
  • 00:43:16
    termination has to be used as it is you
  • 00:43:19
    don't need to take a complex conjugate
  • 00:43:21
    of this so once we have these variables
  • 00:43:24
    set but before we assign those numbers
  • 00:43:27
    to these termination I just want to see
  • 00:43:30
    in a 50 ohm operation how my PA will
  • 00:43:33
    perform and here I do have bunch of um
  • 00:43:36
    equations Computing my power delivered
  • 00:43:39
    in Watts power delivered in dbm the
  • 00:43:43
    input power the DC power then I'm
  • 00:43:46
    commuting the power added efficiency as
  • 00:43:49
    well as I'm Computing the train
  • 00:43:51
    efficiency so that we can match that
  • 00:43:53
    efficiency number from the data sheet if
  • 00:43:56
    required and then based on power
  • 00:43:58
    delivered and power available using
  • 00:44:01
    these equation I will be able to do a
  • 00:44:04
    large signal gain um you know
  • 00:44:06
    calculation so instead of relying on
  • 00:44:08
    graphs Etc I have written this equation
  • 00:44:11
    and again these equations are available
  • 00:44:14
    as a part of template or you could
  • 00:44:16
    simply write it yourself now IL load V
  • 00:44:19
    load all these are name of these nodes
  • 00:44:22
    you can see there is a current probe
  • 00:44:24
    here and all of these have been named
  • 00:44:26
    properly so if you try to replicate this
  • 00:44:29
    kind of template or equation on your
  • 00:44:32
    side make sure you modify my equation
  • 00:44:35
    based on the names which you're using at
  • 00:44:38
    your side all right okay so let's go
  • 00:44:41
    ahead and see how this device operates
  • 00:44:43
    in a 50 ohm now here is the output power
  • 00:44:46
    Spectrum you can see the output you know
  • 00:44:49
    power on this graph is around 38 TBM and
  • 00:44:53
    same thing is predicted by my equation
  • 00:44:55
    for for now and then you have a power
  • 00:44:58
    added deficiency which is around 40% now
  • 00:45:01
    remember the first DC analysis we did
  • 00:45:04
    this is what DC analysis predicted
  • 00:45:06
    around
  • 00:45:08
    36% uh or something like that efficiency
  • 00:45:11
    and that is what we are getting the
  • 00:45:13
    drain efficiency obviously is slightly
  • 00:45:15
    higher large signal gain is around 9 DB
  • 00:45:19
    in power output in wats is around 6.3 DP
  • 00:45:23
    and these are your small signal gain and
  • 00:45:25
    small small signal uh input and output
  • 00:45:28
    matching and these two are current
  • 00:45:31
    waveforms uh the VDS SII now uh remember
  • 00:45:35
    we talked about intrinsic voltage and
  • 00:45:38
    current information now depending upon
  • 00:45:40
    which device vendor uh device you are
  • 00:45:43
    using when you simulate as a part of
  • 00:45:46
    data set uh they will um you know also
  • 00:45:50
    give you some things like IDI which is
  • 00:45:53
    intrinsic drain current and also also
  • 00:45:56
    the voltage which is
  • 00:45:58
    vdsi which is intrinsic gate voltage so
  • 00:46:01
    if you want to plot the dynamic load
  • 00:46:04
    line Etc you should be using these
  • 00:46:07
    voltages rather than you know uh
  • 00:46:10
    plotting the dynamic load line Etc using
  • 00:46:13
    this voltage and this current because
  • 00:46:15
    vdsi and IDI shows you how is the
  • 00:46:19
    voltage in current inside this device
  • 00:46:21
    right at the train terminal of your
  • 00:46:24
    gallium nitrate transistor so they show
  • 00:46:26
    you the true picture of how much your
  • 00:46:29
    fet is conducting because anything which
  • 00:46:32
    you get at outside at the load
  • 00:46:34
    termination point is you know when your
  • 00:46:36
    signal has already transitioned through
  • 00:46:38
    package and and you know some of those
  • 00:46:41
    parasitics are already included but
  • 00:46:44
    intrinsic voltage and current gives you
  • 00:46:46
    exactly what's happening at the terminal
  • 00:46:48
    of a gate so imagine you open the fet
  • 00:46:51
    and put a probe right at the train
  • 00:46:53
    terminal of your device so this is very
  • 00:46:56
    very useful you should look at it now so
  • 00:46:59
    that was 50 ohm operation of course we
  • 00:47:01
    expect that now let's change this to ZL
  • 00:47:05
    which is what we obtained from load
  • 00:47:07
    poool and complex conjugate of the
  • 00:47:10
    source impedence now this is you know
  • 00:47:13
    creating a condition where your
  • 00:47:14
    amplifier is perfectly matched for
  • 00:47:17
    fundamental frequency not for the
  • 00:47:20
    harmonic frequency yet it is only a
  • 00:47:22
    fundamental frequency so your harmonics
  • 00:47:25
    will also see the same terminations
  • 00:47:28
    which is not Optimum remember in load
  • 00:47:30
    pull you set it to either open circuit
  • 00:47:33
    or short circuit here your harmonics are
  • 00:47:36
    also going to see the same Source
  • 00:47:38
    frequency same load frequency so let's
  • 00:47:41
    see what happens so we'll go ahead and
  • 00:47:43
    analyze this and I'll look at the table
  • 00:47:46
    there so output power as predicted by
  • 00:47:49
    loot pull is you know around 41 or
  • 00:47:52
    higher dbm efficiency is around 56% %
  • 00:47:56
    drain efficiency is 60% which is very
  • 00:47:59
    close to what was mentioned in the data
  • 00:48:01
    sheet of of the device here if you go to
  • 00:48:04
    the first page so we are we are able to
  • 00:48:07
    operate pretty close to what has been
  • 00:48:10
    you know um showed to us in data sheet
  • 00:48:12
    pretty good the last signal gain is
  • 00:48:14
    around 12.5 DB this is what exactly our
  • 00:48:17
    load pull was saying and output power
  • 00:48:19
    delivered is around 13 watt and this is
  • 00:48:22
    what your data sheet also talks about 13
  • 00:48:25
    watt of typical pad right so all in all
  • 00:48:28
    everything is falling into place pretty
  • 00:48:30
    nicely now here is the difference so
  • 00:48:33
    don't confuse yourself when you look at
  • 00:48:35
    this spectral plot and if you put a
  • 00:48:38
    marker there it is reading 38.7 dbm
  • 00:48:42
    power whereas this is showing 41 dbm so
  • 00:48:45
    what's the difference between two now
  • 00:48:47
    when you use dbm function in these plots
  • 00:48:50
    it is always referring to 50 ohm as a
  • 00:48:53
    reference impedence to do your power
  • 00:48:56
    computation however if you remember the
  • 00:48:58
    P delivered um you know equation here it
  • 00:49:02
    is it is reading your instantaneous node
  • 00:49:05
    voltage and the current and that is
  • 00:49:08
    based on the ZL specification so that's
  • 00:49:12
    normalized or calculated as per this
  • 00:49:14
    impedence not the 50 ohm and you know
  • 00:49:17
    this impedence is not 50 ohm because
  • 00:49:19
    this is 28 +
  • 00:49:21
    j.5 all right so there'll be always well
  • 00:49:24
    you know this kind of discrepancy unless
  • 00:49:27
    you un normalize this dbm calculation to
  • 00:49:30
    the load impedence which you are using
  • 00:49:32
    so be mindful of that and don't end up
  • 00:49:35
    confusing yourself right so here is the
  • 00:49:38
    the voltage and current you know profile
  • 00:49:41
    after you terminate the device into nice
  • 00:49:44
    matching condition which you are looking
  • 00:49:46
    for and here is your gain small signal
  • 00:49:49
    gain which is going to be around 15.6 TB
  • 00:49:53
    and if you go back to data sheet
  • 00:49:56
    this is what roughly we are estimating
  • 00:49:58
    around 2 GHz so it's a perfectly
  • 00:50:00
    matching condition and the output match
  • 00:50:03
    not so great because we went for power
  • 00:50:06
    match remember we haven't gone for
  • 00:50:08
    simultaneous conjugate match we have
  • 00:50:11
    gone to mash the device to the best
  • 00:50:14
    possible uh you know power uh condition
  • 00:50:17
    and again this is a small signal match
  • 00:50:20
    this is not a large signal match but
  • 00:50:23
    looking at this power we can confidently
  • 00:50:25
    say it's a good large signal match
  • 00:50:27
    because we are able to extract the
  • 00:50:29
    maximum power and you know maximum power
  • 00:50:32
    can only be delivered if you do a
  • 00:50:33
    complex conjugate match but that is
  • 00:50:36
    large signal matching not a small signal
  • 00:50:40
    what you call as um you know s22 and
  • 00:50:42
    there are templates available inside
  • 00:50:44
    areas to do large signal S11 large
  • 00:50:47
    signal s22 if you want to do that but
  • 00:50:51
    for now I'm only doing things which are
  • 00:50:53
    shown to you in data sheet and they
  • 00:50:55
    always show you small signal matching
  • 00:50:57
    conditions here all right so going back
  • 00:51:01
    uh to our you know agenda for this part
  • 00:51:04
    of tutorial we covered we went through
  • 00:51:08
    the PA introduction classes of operation
  • 00:51:11
    dciv and bias Point analysis we looked
  • 00:51:14
    at a stability analysis performed the
  • 00:51:16
    initial load pull and then we went ahead
  • 00:51:19
    and perform a 3db based load pull to
  • 00:51:21
    finalize our right source and load
  • 00:51:23
    impedence and finally did a validation
  • 00:51:26
    of source and load impedence which we
  • 00:51:28
    found in Step number five in a in a PA
  • 00:51:32
    operating mode and make sure if we do
  • 00:51:34
    the right impedence matching we will get
  • 00:51:37
    all the design specification as we are
  • 00:51:40
    looking at and that would lead us to
  • 00:51:42
    part two of this video where we will
  • 00:51:44
    continue this learning and we will
  • 00:51:48
    Design the input and output matching
  • 00:51:49
    Network and there are plenty of good
  • 00:51:52
    tips and tricks which you need to know
  • 00:51:54
    by for doing a right matching Network
  • 00:51:57
    design for PA amplifier you know PA kind
  • 00:52:00
    of operation and we are going to talk
  • 00:52:03
    about that in part two video and then we
  • 00:52:06
    will finalize the PA by optimizing it
  • 00:52:09
    and doing a layout in Emco simulation so
  • 00:52:12
    that's all for this video hope you
  • 00:52:14
    thoroughly enjoyed the content presented
  • 00:52:16
    in this tutorial and I look forward to
  • 00:52:18
    see you in part two of this tutorial
  • 00:52:21
    series have a great time designing and
  • 00:52:24
    wish you all the best in your design
  • 00:52:26
    work my friends
Tags
  • amplificador de potência
  • design de RF
  • GaN
  • eficiência
  • linearidade
  • modelo não linear
  • análise de carga
  • DPD
  • classes de operação
  • tutorial de design